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 ICX077AK
Diagonal 3.6mm (Type 1/5) CCD Image Sensor for PAL Color Video Cameras
Description The ICX077AK is an interline CCD solid-state image sensor suitable for PAL color video cameras. This device possesses a number of pixels that is compatible with both SIF and CIF, and offers excellent cost performance due to the adoption of an ultra-small image size and a 10 mm-square 14-pin plastic package. High sensitivity and low dark current are achieved through the use of Ye, Cy, Mg, and G complementary color mosaic filters and through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip features a field period readout system and an electronic shutter with variable chargestorage time. Features * High sensitivity and low dark current * Low smear * Excellent antiblooming characteristics * Ye, Cy, Mg, and G complementary color mosaic filters on chip * Horizontal register: 5V drive (drive frequency: 6.75MHz) * Reset gate: 5V drive (no adjustment of bias) Device Structure * Image size: * Number of effective pixels: * Total number of pixels: * Interline CCD image sensor * Chip size: * Unit cell size: * Optical black: * Number of dummy bits: * Substrate material: 14 pin DIP (Plastic)
Pin 1 2
V
12
Diagonal 3.6mm (Type 1/5) 358 (H) x 583 (V) approx. 210K pixels 379 (H) x 597 (V) approx. 230K pixels
2 Pin 8 H 19
3.75mm (H) x 3.30mm (V) 8.20m (H) x 3.75m (V) Horizontal (H) direction: Front 2 pixels, rear 19 pixels Vertical (V) direction: Front 12 pixels, rear 2 pixels Horizontal 14 Vertical 1 (even fields only) Silicon
Optical black position (Top View)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E95507D99
ICX077AK
VOUT
GND
CGG
V2
V1
V3
7
6
5
4
3
2
Vertical register
G Cy Cy G Cy Mg
Mg Ye Ye Mg Ye G
G Cy Cy G Cy Mg
Mg Ye Ye Mg Ye G Note)
Horizontal register 8 9 10 11 12 13 14
V4
1
Block Diagram and Pin Configuration (Top View)
Note)
: Photo sensor
GND
SUB
Pin Description Pin No. 1 2 3 4 5 6 7 Symbol V4 V3 V2 V1 CGG GND VOUT
Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Output amplifier gate1 GND Signal output
VDD
Pin No. 8 9 10 11 12 13 14
H1
Symbol VDD GND SUB VL RG H1 H2
H2
VL
RG
Description Supply voltage GND Substrate (overflow drain) Protective transistor bias Reset gate clock Horizontal register transfer clock Horizontal register transfer clock
1 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 1F or more. Absolute Maximum Ratings Item Substrate voltage SUB - GND Supply voltage Clock input voltage VDD, VOUT, CGG - GND VDD, VOUT, CGG - SUB V1, V2, V3, V4 - GND V1, V2, V3, V4 - SUB Ratings -0.3 to +55 -0.3 to +18 -55 to +12 -15 to +20 to +12 to +15 to +17 -17 to +17 -10 to +15 -55 to +10 -65 to +0.3 -0.3 to +27.5 -0.3 to +22.5 -0.3 to +17.5 -30 to +80 -10 to +60 Unit V V V V V V V V V V V V V V C C 3 2 Remarks
Voltage difference between vertical clock input pins Voltage difference between horizontal clock input pins H1, H2 - V4 H1, H2 - GND H1, H2 - SUB VL - SUB V1, V3, VDD, VOUT - VL RG - GND V2, V4, CGG, H1, H2, GND - VL Storage temperature Operating temperature
2 +27V (Max.) when clock width < 10s, clock duty factor < 0.1%. 3 When CGG or GND (Pin 6) are grounded. -0.3 to + 17.5V when CGG and GND (Pin 6) are to be disconnected. -2-
ICX077AK
Bias Conditions Item Supply voltage Substrate voltage adjustment range Substrate voltage adjustment precision Protective transistor bias DC Characteristics Item Supply current Input current Input current Symbol IDD IIN1 IIN2 Min. Typ. 3 Max. 5 1 10 Unit mA A A 3 4 Remarks VL Symbol VDD VSUB Min. 14.25 5.0 Indicated voltage - 0.1 Indicated voltage 2 Typ. 15.0 Max. 15.75 12.75 Indicated voltage + 0.1 Unit Remarks V V V 1
1 Indications of substrate voltage (VSUB) setting value The setting value of the substrate voltage is indicated on the back of image sensor by a special code. Adjust the substrate voltage (VSUB) to the indicated voltage. VSUB code - one character indication VSUB code Code and optimal setting correspond to each other as follows. VSUB code Optimal setting VSUB code Optimal setting VSUB code Optimal setting - 5.0 E = 5.25 f 0 5.5 G 9.0 Y 1 5.75 h 9.25 Z 2 6.0 J 9.5 3 6.25 K 4 6.5 L 6 7 8 9 7.5 R A 7.75 S C d
6.75 7.0 7.25 m N P
8.0 8.25 U V
8.5 8.75 W X
9.75 10.0 10.25 10.5 10.75 11.0 11.25 11.5 11.75
12.0 12.25 12.5 12.75
"L" VSUB = 10.0V 2 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used. 3 1) Current to each pin when 16V is applied to VDD, VOUT, RG, CGG, GND (Pin 6), and SUB pins, while pins that are not tested are grounded. 2) Current to each pin when 20V is applied sequentially to V1, V2, V3, and V4 pins, while pins that are not tested are grounded. However, 20V is applied to SUB pin. 3) Current to each pin when 15V is applied sequentially to H1 and H2 pins, while pins that are not tested are grounded. However, 15V is applied to SUB pin. 4) Current to VL pin when 25V is applied to V1, V3, VDD, and VOUT pins or when, 15V is applied to V2, V4, H1, and H2 pins, while VL pin is grounded. However, GND and SUB pins are left open. 5) Current to GND pin when 20V is applied to the RG pin and the GND pin is grounded. 4 Current to SUB pin when 55V is applied to SUB pin, while all pins that are not tested are grounded. -3-
ICX077AK
Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH1, VVH2 VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 VV Vertical transfer clock voltage VVH3 - VVH VVH4 - VVH VVHH VVHL VVLH VVLL Horizontal transfer clock voltage VH VHL VRG Reset gate clock voltage VRGLH - VRGLL VRGH Substrate clock voltage VSUB 4.75 -0.05 4.5 5.0 0 5.0 Min. 14.25 -0.05 -0.2 -8.5 7.3 -0.25 -0.25 Typ. 15.0 0 0 -8.0 8.0 Max. 15.75 0.05 0.05 -7.5 8.55 0.1 0.1 0.3 0.3 0.3 0.3 5.25 0.05 5.5 0.8 VDD + 0.3 VDD + 0.6 VDD + 0.9 21.25 22.5 23.75 Unit V V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 2 3 3 4 4 4 5 Input through 0.01F capacitance Low-level coupling High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) VVH = (VVH1 + VVH2)/2 Remarks
-4-
ICX077AK
Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor Symbol CV1, CV3 CV2, CV4 CV12, CV34 CV23, CV41 CV13, CV24 CH1, CH2 CHH CRG CSUB R1, R2, R3, R4 RGND RH RRG Min. Typ. 520 390 220 150 39 24 18 3 170 100 15 30 39 Max. Unit pF pF pF pF pF pF pF pF pF Remarks
V1 CV12
V2
R1
R2 RH H1 RH H2 CHH CV23 CV13 CH1 CH2
CV1 CV41 CV24 R4
CV2
CV4 RGND CV3 CV34 R3
V4
V3
Vertical transfer clock equivalent circuit
Horizontal transfer clock equivalent circuit
RRG RG CRG
Reset gate clock equivalent circuit
-5-
ICX077AK
Drive Clock Waveform Conditions (1) Readout clock waveform
100% 90%
II II
M VVT 10% 0% tr twh tf 0V M 2
(2) Vertical transfer clock waveform
V1 V3
VVH1
VVHH
VVH VVHL
VVHH VVHH VVHL VVHL VVH3 VVHH VVHL
VVH
VVL1
VVLH
VVL3
VVLH
VVLL VVL VVL
VVLL
V2
V4
VVHH
VVHH
VVH VVHL
VVH
VVHH
VVHH
VVH2 VVHL
VVHL VVH4
VVHL
VVL2
VVLH
VVLH
VVL
VVLL VVL4
VVLL VVL
VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4)
-6-
ICX077AK
(3) Horizontal transfer clock waveform
tr twh tf
90%
VH 10% VHL
twl
(4) Reset gate clock waveform
tr twh tf VRGH
twl RG waveform VRGLH VRGL VRGLL Point A VRG
VRGL + 0.5V
H1 waveform
10%
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL) /2 Assuming VRGH is the minimum value during the interval twh, then: VRG = VRGH - VRGL
-7-
ICX077AK
(5) Substrate clock waveform
100% 90%
M VSUB 10% 0% M 2 tf
VSUB
tr
twh
Clock Switching Characteristics Item Readout clock Vertical transfer clock Horizontal transfer clock Symbol VT V1, V2, V3, V4 H H1 H2 Reset gate clock RG Substrate clock SUB 25 34 55 67 5.6 5.6 107 55 67 9 0.007 0.007 8 0.5 18 twh twl tr tf Unit Remarks During readout
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 2.3 2.5 0.5 15 7 0.007 0.007 5 0.5
s
250 ns 1 18 ns During imaging s During parallel-serial s conversion ns During drain 0.5 s charge
1.5 1.65
1 When vertical transfer clock driver CXD1267 is used. tr and tf are defined by the rise and fall times for 10% to 90% of the interval between VVL and VVH.
-8-
ICX077AK
Image Sensor Characteristics Item Sensitivity Saturation signal Smear Video signal shading Uniformity between video signal channels Dark signal Dark signal shading Flicker Y Flicker R-Y Flicker B-Y Line crawl R Line crawl G Line crawl B Line crawl W Lag Symbol S Ysat Sm SHy Sr Sb Ydt Ydt Fy Fcr Fcb Lcr Lcg Lcb Lcw Lag Min. 220 630 0.007 0.012 25 10 10 2 1 5 5 5 3 3 5 3 0.5 Typ. 300 Max. Unit mV mV % % % % mV mV % % % % % % % % Measurement method 1 2 3 4 5 5 6 7 8 8 8 9 9 9 9 10
(Ta = 25C) Remarks
Ta = 60C
Zone II'
Ta = 60C Ta = 60C
Zone Definition of Video Signal Shading
358 (H) 4 4 8
583 (V)
Zone II'
7
Ignored region Effective pixel region
Measurement System
[A] CCD signal output [Y]
LPF1
(3dB down 4MHz)
Y signal output
CCD
C.D.S
AMP S S H LPF2 H
(3dB down 1MHz) [C] Chroma signal output
Note) Adjust the amplifier gain so that the gain between [A] and [Y], and between [A] and [C] equals 1.
-9-
ICX077AK
Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the substrate voltage is set to the value indicated on the device, and the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of Y signal output or chroma signal output of the measurement system. Color coding of this image sensor & Composition of luminance (Y) and chroma (color difference) signals As shown in the left figure, fields are read out. The charge is mixed by pairs such as A1 and A2 in the A field (pairs such as B in the B field). As a result, the sequence of charges output as signals from the horizontal shift register (Hreg) is, for line A1, (G + Cy), (Mg + Ye), (G + Cy), and (Mg + Ye).
Cy G B Cy Mg
Ye Mg Ye G
Cy G Cy Mg
Ye A1 Mg Ye A2 G
Hreg
Color Coding Diagram
These signals are processed to form the Y signal and chroma (color difference) signal. The Y signal is formed by adding adjacent signals, and the chroma signal is formed by subtracting adjacent signals. In other words, the approximation: Y = {(G + Cy) + (Mg + Ye)} x 1/2 = 1/2 {2B + 3G + 2R} is used for the Y signal, and the approximation: R - Y = {(Mg + Ye) - (G + Cy)} = {2R - G} is used for the chroma (color difference) signal. For line A2, the signals output from Hreg in sequence are (Mg + Cy), (G + Ye), (Mg + Cy), (G + Ye). The Y signal is formed from these signals as follows: Y = {(G + Ye) + (Mg + Cy)} x 1/2 = 1/2 {2B + 3G + 2R} This is balanced since it is formed in the same way as for line A1. In a like manner, the chroma (color difference) signal is approximated as follows: - (B - Y) = {(G + Ye) - (Mg + Cy)} = - {2B - G} In other words, the chroma signal can be retrieved according to the sequence of lines from R - Y and - (B - Y) in alternation. This is also true for the B field.
- 10 -
ICX077AK
Definition of standard imaging conditions 1) Standard imaging condition I: Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/250s, measure the Y signal (Ys) at the center of the screen and substitute the value into the following formula. S = Ys x 250 [mV] 50
2. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with average value of the Y signal output, 200mV, measure the minimum value of the Y signal. 3. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to 500 times the intensity with the average value of the Y signal output, 200mV. When the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (YSm [mV]) of the Y signal output and substitute the value into the following formula. Sm = 1 YSm 1 x x x 100 [%] (1/10V method conversion value) 10 200 500
4. Video signal shading Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Y signal output is 200mV. Then measure the maximum (Ymax [mV]) and minimum (Ymin [mV]) values of the Y signal and substitute the values into the following formula. SHy = (Ymax - Ymin)/200 x 100 [%] 5. Uniformity between video signal channels Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the maximum (Crmax, Cbmax [mV]) and minimum (Crmin, Cbmin [mV]) values of the R - Y and B - Y channels of the chroma signal and substitute the values into the following formula. Sr = I (Crmax - Crmin)/200 I x 100 [%] Sb = I (Cbmax - Cbmin)/200 I x 100 [%] 6. Dark signal Measure the average value of the Y signal output (Ydt [mV]) with the device ambient temperature 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. - 11 -
ICX077AK
7. Dark signal shading After measuring 6, measure the maximum (Ydmax [mV]) and minimum (Ydmin [mV]) values of the Y signal output and substitute the values into the following formula. Ydt = Ydmax - Ydmin [mV] 8. Flicker 1) Fy Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the difference in the signal level between fields (Yf [mV]). Then substitute the value into the following formula. Fy = (Yf/200) x 100 [%] 2) Fcr, Fcb Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, insert an R or B filter, and then measure both the difference in the signal level between fields of the chroma signal (Cr, Cb) as well as the average value of the chroma signal output (CAr, CAb). Substitute the values into the following formula. Fci = (Ci/CAi) x 100 [%] (i = r, b) 9. Line crawls Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then insert a white subject and R, G, and B filters and measure the difference between Y signal lines for the same field (Ylw, Ylr, Ylg, Ylb [mV]). Substitute the values into the following formula. Lci = (Yli/200) x 100 [%] (i = w, r, g, b) 10. Lag Adjust the Y signal output value generated by strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Ylag). Substitute the value into the following formula. Lag = (Ylag/200) x 100 [%]
FLD
SG1 Light Strobe light timing Y signal output 200mV Output Ylag (lag)
- 12 -
Drive Circuit
15V 100k 20 0.1 19 18 17 16 15 14 22/16V 1/10V 13 12 11 100 1 2 3 4 5 6 7 1/35V 3.3/16V 0.1
1
2
VSUB
3
XSUB
4
XV2
5
CXD1267
-8V
XV1
6
XSG1
7
XV3
8
XSG2
9
XV4
10
V4
V3
V2
V1
CGG
GND
VOUT
H2
H1
RG
VL
SUB
GND
14 13 12 11 10
9
H2 1500p 1M
H1
1/20V
100k
VDD
- 13 -
ICX077 ( BOTTOM VIEW )
8 0.01
22/20V
[A] CCD OUT 3.9k 2SK523
0.01 3.3/20V
RG
ICX077AK
ICX077AK
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
1.0
Ye
0.8
Cy G
Relative Response
0.6
0.4
0.2
Mg
0.0 400
450
500
550 Wave Length [nm]
600
650
700
Sensor Readout Clock Timing Chart
HD V1 V2 Odd Field V3 V4 38.4 0.3 V1 V2 Even Field V3 V4 Unit: s 1.3 1.6 2.5 2.1
2.5
- 14 -
Drive Timing Chart (Vertical Sync)
FLD
VD
HD
SG1
SG2
- 15 -
2 1 3 57 46
582 581 583
V1
V2
V3
V4 2 4 6 8 10 13579
CCD OUT
582
581 583
CLP1
ICX077AK
Drive Timing Chart (Horizontal Sync)
HD
H1
H2
1
1
RG
- 16 -
SHP
SHD
V1
V2
V3
V4
CLP1
SUB
358 1
10
20
10
10
ICX077AK
ICX077AK
Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.)
Cover glass
50N Plastic package Compressive strength
50N
1.2Nm Torsional strength
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. - 17 -
ICX077AK
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD characteristics. d) This package has 2 kinds of internal structure. However, their package outline, optical size, and strength are the same.
Structure A Package Chip Metal plate (lead frame) Structure B
Cross section of lead frame
The cross section of lead frame can be seen on the side of the package for structure A.
- 18 -
Package Outline
Unit: mm
14 pin DIP (400mil)
A
14 8 8 14 D C
10.16
7.0
2.5
5.0
V 7 7 1
H
0.5
B'
1.0
3.35 0.15
2.6
1.27 0.46
M
PACKAGE STRUCTURE
PACKAGE MATERIAL
Plastic
1.27 3.5 0.3
0.3
LEAD TREATMENT
GOLD PLATING
LEAD MATERIAL
42 ALLOY
PACKAGE WEIGHT
0.6g
~
- 19 -
2.5 1. "A" is the center of the effective image area. 0.3
7.0
2. The two points "B" of the package are the horizontal reference. The point "B'" of the package is the vertical reference. 3. The bottom "C" of the package, and the top of the cover glass "D" are the height reference. 4. The center of the effective image area relative to "B" and "B'" is (H, V) = (5.0, 5.0) 0.15mm. 5. The rotation angle of the effective image area relative to H and V is 1. 6. The height from the bottom "C" to the effective image area is 1.41 0.10mm. The height from the top of the cover glass "D" to the effective image area is 1.94 0.15mm. 7. The tilt of the effective image area relative to the bottom "C" is less than 40m. The tilt of the effective image area relative to the top "D" of the cover glass is less than 40m. 8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5. 9. The notch of the package is used only for directional index, that must not be used for reference of fixing.
ICX077AK
0.25
1.0
1
8.9 10.0 0.1
8.9 10.0 0.1
1.7
B 1.7
2.5
0 to 9
5.0
~
~


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